1. Field of the Invention
This invention relates to data communications in a computer system, and more specifically, to memory controllers designed to support different types of memory.
2. Art Background
In the past, computer systems have relied heavily upon Dynamic Random Access Memories ("DRAMs") to implement system memories due to their simplicity, affordability and memory density. However, the performance of DRAMs in modern computer systems is lacking due to their slow access times and their inability to burst data. To overcome these problems, a new type of DRAM has been recently developed to enable faster operation in a synchronous fashion. This type of DRAM is referred to as Synchronous Dynamic Random Access Memory ("SDRAM"), which has been described in the JEDEC Standard published by the Joint Electronics Design Evaluation Conference and is manufactured by NEC Corporation as part number UPD42116420.
Yet, the cost of the new SDRAMs is extremely prohibitive, and since SDRAMs require a completely different memory interface, such devices are not compatible with previous memory controllers which support DRAMs. Hence, although the use of SDRAM memories in modern computer systems is quite desirable, they may not be a wise choice at the moment due to their extremely high cost and the fact that they require specially designed memory controllers.
Accordingly, it would be desirable to provide a single memory controller designed to support both conventional Asynchronous DRAMs ("ADRAMs") and Synchronous DRAMs ("SDRAMs") such that either type of memory may be used in a computer system depending upon the needs of the user. In this way, the user may base the design of the computer system on the type of memory that offers the target price/performance ratio of the system with minimal design changes.